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MC74AC574, MC74ACT574 Octal D Flip-Flop with 3-State Outputs
The MC74AC574/74ACT574 is a high-speed, low power octal flip-flop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is stored in the flip-flops on the LOW-to-HIGH Clock (CP) transition. The MC74AC574/74ACT574 is functionally identical to the MC74AC374/74ACT374 except for the pinouts.
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PDIP-20 N SUFFIX CASE 738
20 1
* Inputs and Outputs on Opposite Sides of Package * * * * *
Allowing Easy Interface with Microprocessors Useful as Input or Output Port for Microprocessors Functionally Identical to MC74AC374/74ACT374 3-State Outputs for Bus-Oriented Applications Outputs Source/Sink 24 mA ACT574 Has TTL Compatible Inputs
VCC 20 O0 19 O1 18 O2 17 O3 16 O4 15 O5 14 O6 13 O7 12 CP 11
20 1
SO-20 DW SUFFIX CASE 751
20 1
TSSOP-20 DT SUFFIX CASE 948E EIAJ-20 M SUFFIX CASE 967
20 1
ORDERING INFORMATION
Device 1 OE 2 D0 3 D1 4 D2 5 D3 6 D4 7 D5 8 D6 9 D7 10 GND MC74AC574N MC74ACT574N MC74AC574DW MC74AC574DWR2 Package PDIP-20 PDIP-20 SOIC-20 SOIC-20 SOIC-20 SOIC-20 TSSOP-20 Shipping 18 Units/Rail 18 Units/Rail 38 Units/Rail 1000 Tape & Reel 38 Units/Rail 1000 Tape & Reel 75 Units/Rail
Figure 1. Pinout: 20-Lead Packages Conductors (Top View)
PIN ASSIGNMENT
PIN D0-D7 CP OE O0-O7 FUNCTION Data Inputs Clock Pulse Input 3-State Output Enable Input 3-State Outputs
MC74ACT574DW MC74ACT574DWR2 MC74AC574DT MC74AC574DTR2 MC74ACT574DT MC74ACT574DTR2 MC74AC574M MC74AC574MEL MC74ACT574M MC74ACT574MEL
TSSOP-20 2500 Tape & Reel TSSOP-20 75 Units/Rail
TSSOP-20 2500 Tape & Reel EIAJ-20 EIAJ-20 EIAJ-20 EIAJ-20 40 Units/Rail 2000 Tape & Reel 40 Units/Rail 2000 Tape & Reel
DEVICE MARKING INFORMATION
See general marking information in the device marking section on page 8 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2001
1
May, 2001 - Rev. 6
Publication Order Number: MC74AC574/D
MC74AC574, MC74ACT574
FUNCTION TABLE
D0 D1 D2 D3 D4 D5 D6 D7 CP OE O0 O1 O2 O3 O4 O5 O6 O7 Inputs OE H H H H L L L L CP H H D L H L H L H L H Internal Q NC NC L H L H NC NC Outputs Function F nction On Z Z Z Z L H NC NC Hold Hold Load Load Data Available Data Available No Change in Data No Change in Data
Figure 2. Logic Symbol FUNCTIONAL DESCRIPTION
The MC74AC574/74ACT574 consists of eight edgetriggered flip-flops with individual D-type inputs and 3-state true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops.
D0 CP C Q D C Q D C Q D C Q D D1 D2 D3
H H
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance = LOW-to-HIGH Clock Transition NC = No Change
D4
D5
D6
D7
C Q
D
C Q
D
C Q
D
C Q
D
OE O0 O1 NOTE: O2 O3 O4 O5 O6 O7
This diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
MAXIMUM RATINGS*
Symbol VCC VIN VOUT IIN IOUT ICC Tstg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC VCC or GND Current per Output Pin Storage Temperature Value -0.5 to +7.0 -0.5 to VCC +0.5 -0.5 to VCC +0.5 20 50 50 -65 to +150 Unit V V V mA mA mA C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.
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MC74AC574, MC74ACT574
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN, VOUT Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) VCC @ 3.0 V tr, tf Input Rise and Fall Time (Note 1) AC Devices except Schmitt Inputs VCC @ 4.5 V VCC @ 5.5 V tr, tf TJ TA IOH IOL In ut Input Rise and Fall Time (Note 2) ACT Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current - High Output Current - Low VCC @ 4.5 V VCC @ 5.5 V Parameter AC ACT Min 2.0 4.5 0 - - - - - - -40 - - Typ 5.0 5.0 - 150 40 25 10 8.0 - 25 - - Max 6.0 V 5.5 VCC - - - - ns/V - 140 85 -24 24 C C mA mA ns/V V Unit
1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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MC74AC574, MC74ACT574
DC CHARACTERISTICS
74AC Symbol Parameter VCC (V) TA = +25C Typ VIH Minimum High Level g Input V l I Voltage 3.0 4.5 5.5 VIL Maximum Low Level Input V l I Voltage 3.0 4.5 5.5 VOH Minimum High Level g Output V l O Voltage 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum Low Level O Output V l Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN IOLD IOHD ICC Maximum Input a u u Leakage Current Minimum Dynamic y Output Current Maximum Quiescent a u Qu esce Supply Current 5.5 55 5.5 5.5 5.5 55 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 - - - 0.002 0.001 0.001 - - - - - - - 74AC TA = -40C to +85C 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 1.0 1 0 75 -75 80 A mA mA A *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA VI = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND V *VIN = VIL or VIH -12 mA IOH -24 mA -24 mA IOUT = 50 A V IOUT = -50 A V VOUT = 0.1 V or VCC - 0.1 V V Unit Conditions
Guaranteed Limits 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 0.1 0 1 - - 8.0 80 VOUT = 0.1 V or VCC - 0.1 V
V
V
* All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. NOTE: Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
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MC74AC574, MC74ACT574
AC CHARACTERISTICS (For Figures and Waveforms -- See Section 3)
74AC Symbol Parameter VCC* (V) Min fmax tPLH tPHL tPZH tPZL tPHZ tPLZ Maximum Clock Frequency Propagation Delay CP to On Propagation Delay CP to On Output Enable Time Output Enable Time Output Disable Time Output Disable Time 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 75 95 3.5 2.0 3.5 2.0 2.5 2.0 3.0 1.5 4.0 2.0 2.0 1.5 TA = +25C CL = 50 pF Typ - - - - - - - - - - - - - - Max - - 13.5 9.5 12 8.5 11 8.5 10.5 8.0 12 9.5 9.0 7.5 74AC TA = -40C to +85C CL = 50 pF Min 60 85 3.5 2.0 3.5 2.0 2.5 2.0 3.5 2.0 4.5 2.0 2.5 1.5 Max - - 15 11 13.5 9.5 12 9.0 11.5 9.0 13 10.5 10 8.5 MHz ns ns ns ns ns ns 3-3 3-6 3-6 3-7 3-8 3-7 3-8 Unit Fig. No.
* Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
AC OPERATING REQUIREMENTS
74AC Symbol Parameter VCC* (V) Typ ts th tw Setup Time, HIGH or LOW Dn to CP Hold Time, HIGH or LOW Dn to CP CP Pulse Width HIGH or LOW 3.3 5.0 3.3 5.0 3.3 5.0 - - - - - - TA = +25C CL = 50 pF 74AC TA = -40C to +85C CL = 50 pF Unit Fig. No.
Guaranteed Minimum 2.5 1.5 1.5 1.5 6.0 4.0 3.0 2.0 1.5 1.5 7.0 5.0 ns ns ns 3-9 3-9 3-6
*Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
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MC74AC574, MC74ACT574
DC CHARACTERISTICS
74ACT Symbol Parameter VCC (V) TA = +25C Typ VIH VIL VOH Minimum High Level u g ee Input Voltage Maximum Low Level a u o ee Input Voltage Minimum High Level u g ee Output Voltage 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Maximum Low Level a u o ee Output Voltage 4.5 5.5 4.5 5.5 IIN ICCT IOZ Maximum Input a u u Leakage Current Additional Max. ICC/Input Maximum a u 3-State Current C Minimum Dynamic Output C O t t Current t Maximum Quiescent a u Qu esce Supply Current 55 5.5 5.5 5.5 5.5 5.5 5.5 55 1.5 1.5 1.5 1.5 4.49 5.49 - - 0.001 0.001 - - - 0.6 - - - - 0.5 - - 8.0 80 74ACT TA = -40C to +85C Unit Conditions
Guaranteed Limits 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 0 1 0.1 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 1 0 1.0 1.5 5.0 75 -75 80 V V V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 A *VIN = VIL or VIH -24 mA IOH -24 mA IOUT = 50 A *VIN = VIL or VIH 24 mA IOL 24 mA VI = VCC, GND VI = VCC - 2.1 V VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND
V
V
V
A mA A mA mA A
IOLD IOHD ICC
*All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS (For Figures and Waveforms -- See Section 3)
74ACT Symbol Parameter VCC* (V) Min fmax ma tPLH tPHL tPZH tPZL tPHZ tPLZ Maximum Clock Frequency Pro agation Propagation Delay CP to On Pro agation Propagation Delay CP to On Output Enable Time Output Enable Time Output Disable Time Output Disable Time 5.0 50 5.0 50 5.0 50 5.0 5.0 5.0 5.0 100 2.5 25 2.0 20 2.0 2.0 2.0 2.0 TA = +25C CL = 50 pF Typ - - - - - - - Max - 11 10 9.5 9.0 10.5 8.5 74ACT TA = -40C to +85C CL = 50 pF Min 85 2.0 20 1.5 15 1.5 1.5 1.5 1.5 Max - 12 11 10 10 11.5 9.0 ns ns ns ns ns ns ns 3-3 3-6 3-6 3-7 3-8 3-7 3-8 Unit Fig. No.
*Voltage Range 5.0 V is 5.0 V 0.5 V.
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MC74AC574, MC74ACT574
AC OPERATING REQUIREMENTS
74ACT Symbol Parameter VCC* (V) Typ ts th tw Setu Setup Time, HIGH or LOW Dn to CP Hold Time, HIGH or LOW Dn to CP CP Pulse Width HIGH or LOW 5.0 50 50 5.0 5.0 50 - - - TA = +25C CL = 50 pF 74ACT TA = -40C to +85C CL = 50 pF Unit Fig. No.
Guaranteed Minimum 2.5 25 10 1.0 3.0 30 2.5 25 10 1.0 4.0 40 ns ns ns 3-9 3-9 3-6
*Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
CAPACITANCE
Symbol CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Value Typ 4.5 40 Unit pF pF Test Conditions VCC = 5.0 V VCC = 5.0 V
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MC74AC574, MC74ACT574
MARKING DIAGRAMS
PDIP-20 MC74AC574N AWLYYWW SO-20 AC574 AWLYYWW TSSOP-20 EIAJ-20
AC 574 ALYW
74AC574 AWLYWW
MC74ACT574N AWLYYWW
ACT574 AWLYYWW
ACT 574 ALYW
74ACT574 AWLYWW
A WL, L YY, Y WW, W
= Assembly Location = Wafer Lot = Year = Work Week
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MC74AC574, MC74ACT574
PACKAGE DIMENSIONS
PDIP-20 N SUFFIX 20 PIN PLASTIC DIP PACKAGE CASE 738-03 ISSUE E
-A-
20 1 11 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. DIM A B C D E F G J K L M N INCHES MIN MAX 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 BSC 0.050 0.070 0.100 BSC 0.008 0.015 0.110 0.140 0.300 BSC 0_ 15 _ 0.020 0.040 MILLIMETERS MIN MAX 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 BSC 1.27 1.77 2.54 BSC 0.21 0.38 2.80 3.55 7.62 BSC 0_ 15_ 0.51 1.01
B
10
C
L
-T-
SEATING PLANE
K M E G F D
20 PL
N J 0.25 (0.010)
M 20 PL
0.25 (0.010) TA
M
M
TB
M
SO-20 DW SUFFIX 20 PIN PLASTIC SOIC PACKAGE CASE 751D-05 ISSUE F
D q
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_
A
11 X 45 _
H
M
B
M
20
10X
0.25
E
1
10
20X
B 0.25
M
B TA
S
B
S
A
SEATING PLANE
h
18X
e
A1
T
C
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L
MC74AC574, MC74ACT574
PACKAGE DIMENSIONS
TSSOP-20 DT SUFFIX 20 PIN PLASTIC TSSOP PACKAGE CASE 948E-02 ISSUE A
20X
K REF
M
0.15 (0.006) T U
S
0.10 (0.004)
TU
S
V
S
2X
L/2
20
11
B L
PIN 1 IDENT 1 10
J J1
-U-
SECTION N-N 0.25 (0.010) M
N 0.15 (0.006) T U
S
A -V- N F
C D 0.100 (0.004) -T- SEATING
PLANE
G
H
DETAIL E
EIAJ-20 M SUFFIX 20 PIN PLASTIC EIAJ PACKAGE CASE 967-01 ISSUE O
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --2.05 0.05 0.20 0.35 0.50 0.18 0.27 12.35 12.80 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --0.81 INCHES MIN MAX --0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.486 0.504 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --0.032
20
11
LE Q1 M_ L DETAIL P
E HE
1
10
Z D e VIEW P A
b 0.13 (0.005)
M
A1 0.10 (0.004)
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III III III
DETAIL E
K K1
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
-W-
c
MC74AC574, MC74ACT574
Notes
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MC74AC574, MC74ACT574
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MC74AC574/D

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